In many power applications parallel coupling of voltage converting modules (also widely referred to as voltage converters, power supplies or power modules), such as point-of-load (POL) converters, isolated DC/DC converters, bus converters or AC/DC power supplies, caters for the increasing need for greater total power. For example, a typical DC/DC system has an intermediate voltage level of 48 VDC, which is converted down to a typical level of 9-12 VDC. Since this 9-12 V DC-level often requires DC/DC converters that can handle high output current it is often desirable to couple two or more converters in parallel to provide a power converter system in which the load current is shared among the converters. In addition, this redundant topology is particularly suited to applications where a reliable power source is required, for example in high-end servers and tele-communications equipment.
In order to optimise the reliability of the power system it is desirable to evenly distribute the load current among the parallel-coupled power converters, so that the power stress and efficiency are similar for the converters. This has often been achieved in the past with some kind of circuitry that is external to the power supplies, for example o-ring diodes and droop resistors in a passive current share set-up. However, in applications where the conversion losses associated with this passive set-up cannot be tolerated an active current share arrangement can be used. For example, the voltage converting modules may be configured to exchange information concerning their current output levels with other modules and self-regulate their output power on the basis of the received information.
An example of such an active current share scheme is described in US patent application US 2008/0309300 A1. More specifically, a digital current share bus interface is described in which current sense data is conveyed digitally over a current share bus (or simply “share bus”), using a single-wire communication protocol. A power module, being one of several having their outputs connected in parallel, is arranged to provide a digital output signal representative of its output current to an associated share bus interface, and to adjust its output current in response to a signal received from the interface. The power modules are coupled to the current share bus via their respective share bus interfaces.
Each interface includes a digital controller which comprises a data formatting module and a comparator module. The data formatting module receives the output signal representative of the output current of the associated power module and generates a digital word which varies with the output current; the bits of the digital word are coupled to the current share bus. The data formatting module is arranged such that a clock for the bus is modulated onto the data conveyed on the bus. The comparator module receives digital words conveyed via the bus and provides the control signal to the power module so as to adjust its output current to match the current value represented by the digital word on the bus.
In operation, the digital words are conveyed on the current share bus in the form of frames, which are repeated continuously at a frequency of about 10 kHz. Each interface receives current sense information from its respective power module and attempts to write the corresponding word on the current share bus during each frame. Each interface also reads the word representing an output current value on the bus, and compares the read value with the value represented by the word being output, in a bit-by-bit routine, starting with the most significant bit. When the interface detects “contention”—i.e. an interface writes a ‘0’ to the bus, but detects a ‘1’—it will immediately stop writing to the bus for the duration of the frame. In this way, the data on the bus is a representation of the normalized current of the power module providing the highest output current.
The power module providing the highest output current subsequently decreases its current output while the remaining power modules increase their output current on the basis of the control signals generated by their respective comparator modules. To prevent hunting or oscillation between power modules, an interface conveying a digital word that is within two least significant bits of the interface controlling the bus is required to stop increasing its module's output current.
The current sharing scheme described above thus requires each power module to attempt to put a word representing its measured output current value on the share bus during each frame, and to compare this word bit-wise with the word being read from the bus by the module. This, however, requires a data processing overhead which reduces the efficiency of the power converter. In addition, the implementation of these operations increases the complexity of the power converter's hardware. A simpler and more efficient scheme of configuring and controlling current sharing in a system of parallel-coupled power converters is therefore highly desirable.